First off, excellent information hwg! It is refreshing to find someone who has a grasp on CPU architecture and electrical engineering to boot.
Any ideas or help you can provide would be awesome; and welcome to the forums!
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I have to agree with hwg on this one. I don't think there is any way to modify latencies on die without doing it at the manufacturing lvl.
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This is true. The trace lengths in the proc dictate timing. Unfortunately, we don't have a fab at our disposal.
HOWEVER, if we able to get a custom proc / mobo you could do several things to keep the timing issue at bay.
CPU
1) Disable all xtra instruction sets. sse, mmx, etc..
2) Disable HT.
3) Disable extra cores.
4) Nerf the cache to like 32k. (We are just going for frequency right?)
Starting to sound like a Celeron now
Motherboard:
1) Kill the ISA bus
2) Kill the PCI bus.
3) Hell, get rid of everything.
If we could get a company, say ASUS, to produce a P5B Deluxe with no sound, raid, NIC, etc... That would be the most viable solution.
I've listed a few things that would help, but there are a ton more. Let's make a list. Any ideas?